Microchip | 25LC512T-I/SN

The 25LC512 is a 512 Kbit serial EEPROM memory with byte-level and page-level serial EEPROM functions. It also features Page, Sector and Chip erase functions typically associated with Flash-based products. These functions are not required for byte or page write operations. The memory is accessed via a simple Serial Peripheral Interface (SPI) compatible serial bus. The bus signals required are a clock input (SCK) plus separate data in (SI) and data out (SO) lines. Access to the device is controlled by a Chip Select [CS(bar)] input.

Communication to the device can be paused via the hold pin [HOLD(bar)]. While the device is paused, transitions on its inputs will be ignored, with the exception of Chip Select, allowing the host to service higher priority interrupts. The 25LC512 is available in standard packages including 8-lead PDIP, SOIC, and advanced 8-lead DFN package. All packages are Pb-free and RoHS compliant.  

Features:

• 20 MHz max. Clock Speed
• Byte and Page-level Write Operations
• 128-byte page
• 5 ms max.
• No page or sector erase required
• Low-Power CMOS Technology
• Max. Write Current: 5 mA at 5.5 V, 20 MHz
• Read Current: 10 mA at 5.5 V, 20 MHz
• Standby Current: 1 μA at 2.5 V (Deep powerdown)
• Electronic Signature for Device ID
• Self-Timed Erase and Write cycles
• Page Erase (5 ms, typical)
• Sector Erase (10 ms/sector, typical)
• Bulk Erase (10 ms, typical)
• Sector Write Protection (16 K byte/sector)
• Protect none, 1/4, 1/2 or all of array
• Built-In Write Protection
• Power-on/off data protection circuitry
• Write enable latch
• Write-protect pin
• High Reliability
• Endurance: 1 Million erase/write cycles
• Data Retention: >200 years
• ESD Protection: >4000 V
• Temperature Ranges Supported:
• Industrial (I): -40°C to +85°C
• Pb-free and RoHS Compliant