Nexperia | 74LVC138APW,118

The 74LVC138A accepts three binary weighted address inputs (A0, A1 and A2) and when enabled, provides 8 mutually exclusive active LOW outputs (Y0 to Y7). The 74LVC138A features three enable inputs: two active LOW (E1 and E2) and one active HIGH (E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH.

Features:

• 5 V tolerant inputs for interfacing with 5 V logic
• Wide supply voltage range from 1.2 to 3.6 V
• CMOS low power consumption
• Direct interface with TTL levels
• Inputs accept voltages up to 5.5 V
• Demultiplexing capability
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Active LOW mutually exclusive outputs
• Output drive capability 50 Ohm transmission lines at 125 Cel
• Complies with JEDEC standard no. 8-1A
• ESD protection:
  • HBM EIA/JESD22-A114-A exceeds 2000 V
  • MM EIA/JESD22-A115-A exceeds 200 V
• Specified from -40 to +85 Cel and -40 to +125 Cel