Manufacturer Part #
74LVC1G74DP,125
74LVC Series 5.5 V SMT Single D-Type Flip-Flop; Postive Edge Trigger - TSSOP-8
Product Specification Section
Nexperia 74LVC1G74DP,125 - Product Specification
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ECCN:
EAR99
PCN Information:
N/A
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Date
Part Status:
Active
Active
Nexperia 74LVC1G74DP,125 - Technical Attributes
Attributes Table
Logic Circuit: | D-Type, Flip Flop IC |
Family: | A/LVC/E/H/U |
No of Functions / Channels: | 1 |
Output Characteristics: | Differential |
Package Style: | TSSOP-8 |
Mounting Method: | Surface Mount |
Features & Applications
The 74LVC1G74DP is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing damaging backflow current through the device when it is powered down.
Features:
- Wide supply voltage range from 1.65 V to 5.5 V
- 5 V tolerant inputs for interfacing with 5 V logic
- High noise immunity
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8-B/JESD36 (2.7 V to 3.6 V)
- ±24 mA output drive (VCC = 3.0 V)
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Inputs accept voltages up to 5 V
- Multiple package options
- Specified from -40 ℃ to +85 ℃ and -40 ℃ to +125 ℃
Pricing Section
Global Stock:
3,000
USA:
3,000
On Order:
0
Factory Lead Time:
8 Weeks
Quantity
Unit Price
3,000
$0.126
6,000
$0.125
9,000
$0.124
12,000
$0.123
15,000+
$0.121
Product Variant Information section
Available Packaging
Package Qty:
3000 per Reel
Package Style:
TSSOP-8
Mounting Method:
Surface Mount