Référence fabricant
SY89873LMG
SY89873U - 2 GHz Any Diff. In-to-LVDS Programmable Clock Divider/ Fanout Buffer
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| Nom du fabricant: | Microchip | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :100 par Tube Style d'emballage :MLF-16 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | 2217 | ||||||||||
Microchip SY89873LMG - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
PCN Status:Final NotificationDescription of Change:Qualification of MMT as a new final test site for selected SY84782xxx, SY88149xxx, SY88932xxx, SY88992xxx, SY89230xxx, SY89832xxx, SY89833xxx, SY89834xxx, SY89840xxx, SY89841xxx, SY89871xxx, SY89872xxx, SY89873xxx, SY89874xxx, SY89875xxx, SY89876xxx, and SYCUSTxxx device families available in 16L VQFN (3x3x1.00mm) package.Reason for Change:To improve manufacturability by qualifying MMT as a new final test site.Change Implementation Status:In ProgressEstimated First Ship Date:April 24, 2023 (date code: 2317)
Statut du produit:
Microchip SY89873LMG - Caractéristiques techniques
| Input Voltage-Max: | 4.3V |
| Temperature Range: | -40°C to +85°C |
| Supply Voltage-Nom: | 3V to 3.6V |
| Frequency-Max: | 2GHz |
| Style d'emballage : | MLF-16 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The SY89873LMG is a 3.3 V supply voltage and 2 GHz frequency precision LVDS output clock divider, available in surface mount MLF-16 package.
Features:
- Guaranteed AC performance
- >2.0GHz fMAX output toggle
- >3.0GHz fMAX input
- <800ps tPD (matched-delay between banks)
- <15ps within-device skew
- <190ps rise/fall time
- Low jitter design
- <1psRMS cycle-to-cycle jitter
- <10psPP total jitter
- Unique input termination and VT pin for DC-coupled and AC-coupled inputs: any differential inputs (LVPECL, LVDS, CML, HSTL)
- Precision differential LVDS outputs
- Matched delay: all outputs have matched delay, independent of divider setting
- TTL/CMOS inputs for select and reset/disable
- Two LVDS output banks (matched delay)
- Bank A: Buffered copy of input clock (undivided)
- Bank B: Divided output (÷2, ÷4, ÷8, ÷16), two copies
- 3.3V power supply
- Wide operating temperature range: -40°C to +85°C
- Available in 16-pin (3mm x 3mm) MLF® package
Applications:
- SONET/SDH line cards
- Transponders
- High-end, multiprocessor servers
Emballages disponibles
Qté d'emballage(s) :
100 par Tube
Style d'emballage :
MLF-16
Méthode de montage :
Surface Mount