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Manufacturer Part #

74LVC125APW,118

74LVC Series 3.3V 3-State Quad Buffer/Line Driver Surface Mount - TSSOP-14

Product Specification Section
Nexperia 74LVC125APW,118 - Technical Attributes
Attributes Table
Logic Circuit: Buffer/Line Driver
Family: A/LVC/E/H/U
No of Functions / Channels: 4
Output Characteristics: 3-ST
Supply Voltage-Nom: 3.6V
Supply Current: 100mA
Power Dissipation: 500mW
Propagation Delay: 12.8ns
Operating Temperature: -40°C to +125°C
No of Inputs: 4
No of Outputs: Quad
High Level Output Current: -24mA
Low Level Output Current: 24mA
No of Pins: 14
Moisture Sensitivity Level: 1
Package Style:  TSSOP-14
Mounting Method: Surface Mount
Features & Applications

The 74LVC125APW is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. In 3-state operation, outputs can handle 5 V.

The 74LVC125A consists of four non-inverting buffers/line drivers with 3-state outputs (nY) which are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state.

Features:

  • 5 V tolerant inputs/outputs for interfacing with 5 V logic
  • Wide supply voltage range from 1.2 to 3.6 V
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Inputs accept voltages up to 5.5 V
  • Complies with JEDEC standard no. 8-1A
  • ESD protection:
    • HBM EIA/JESD22-A114-A exceeds 2000 V
    • MM EIA/JESD22-A115-A exceeds 200 V
  • Specified from -40 to +85 Cel and -40 to +125 Cel

 

 

 
Pricing Section
Global Stock:
2,500
USA:
2,500
65,000
Factory Stock:Factory Stock:
-1
Factory Lead Time:
8 Weeks
Minimum Order:
2500
Multiple Of:
2500
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Tariff charges may apply if shipping to the United States. An estimate of tariff charges will be calculated at checkout.
Total
$197.25
USD
Quantity
Unit Price
2,500
$0.0789
7,500
$0.0768
10,000
$0.0763
25,000
$0.0747
37,500+
$0.0731