Manufacturer Part #
74LVC07APW,118
74LVC Series 5.5 V Surface Mount Hex Buffer with Open-Drain Outputs - TSSOP-14
Product Specification Section
Nexperia 74LVC07APW,118 - Product Specification
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ECCN:
EAR99
PCN Information:
N/A
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Date
Part Status:
Active
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Nexperia 74LVC07APW,118 - Technical Attributes
Attributes Table
Logic Circuit: | Buffer |
Family: | A/LVC/E/H/U |
No of Functions / Channels: | 6 |
Output Characteristics: | O-DRN |
Supply Voltage-Nom: | 1.65V to 5.5V |
Power Dissipation: | 0.5W |
Propagation Delay: | 1.6ns |
Operating Temperature: | -40°C to +125°C |
Capacitance: | 5pF |
No of Inputs: | 6 |
No of Outputs: | Six |
Low Level Output Current: | 32mA |
No of Pins: | 14 |
Quiescent Current: | 0.1µA |
Moisture Sensitivity Level: | 1 |
Package Style: | TSSOP-14 |
Mounting Method: | Surface Mount |
Features & Applications
The 74LVC07APW is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3 or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 to 5 V environment. The 74LVC07A provides six non-inverting buffers.
Features:
- 5 V tolerant inputs and outputs (open drain) for interfacing with 5 V logic
- Wide supply voltage range from 1.65 to 5.5 V
- CMOS low power consumption
- Direct interface with TTL levels
- Inputs accept voltages up to 5 V
- Complies with JEDEC standard no. 8-1A
- ESD protection:
- HBM EIA/JESD22-A114-A exceeds 2000 V
- MM EIA/JESD22-A115-A exceeds 200 V
Pricing Section
Global Stock:
85,000
Germany (Online Only):
85,000
Factory Lead Time:
8 Weeks
Quantity
Unit Price
2,500
$0.0695
5,000
$0.0683
7,500
$0.0676
12,500
$0.0668
25,000+
$0.065
Product Variant Information section
Available Packaging
Package Qty:
2500 per Reel
Package Style:
TSSOP-14
Mounting Method:
Surface Mount