Microchip | DSPIC33FJ128GP802-I/MM

Microchip provides solutions for the entire performance range of 8-bit, 16-bit, and 32-bit microcontrollers, with a powerful architecture, flexible memory technologies, comprehensive easy-to-use development tools, complete technical documentation and post design-in support through a global sales and distribution network.16-bit PIC Microcontrollers & dsPIC Digital Signal Controllers. Microchip offers two 16-bit Microcontroller (MCU) families plus two 16-bit Digital Signal Controller (DSC) families that give you compatible options across a wide spectrum of price, performance and feature sets.

Common attributes among all 16-bit MCU and DSC families are pinouts, software, peripherals and development tools. Whether your design requires the lowest-priced 16-bit solution, the most powerful 16-bit MCU in the industry, or DSP capability, Microchip offers a broad range of products while preserving the compatibility that help save you time and money on subsequent designs.

The dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, and dsPIC33FJ128GPX02/X04 CPU module has a 16-bit (data) modified Harvard architecture with an enhanced instruction set, including significant support
for DSP. The CPU has a 24-bit instruction word with a variable length opcode field. The Program Counter (PC) is 23 bits wide and addresses up to 4M x 24 bits of user program memory space. The actual amount of program memory implemented varies by device. A single-cycle instruction prefetch mechanism is used to help maintain throughput and provides predictable execution. All instructions execute in a single cycle,with the exception of instructions that change the program flow, the double-word move (MOV.D) instruction and the table instructions. Overhead-free program loop constructs are supported using the DO and REPEAT instructions, both of which are interruptible at any time.

Features:

• Operating Range:
  •  Up to 40 MIPS operation (at 3.0-3.6V):
    •  Industrial temperature range (-40°C to +85°C).
    •  Extended temperature range (-40°C to +125°C).
• High-Performance DSC CPU:
  •  Modified Harvard architecture.
  •  C compiler optimized instruction set.
  •  16-bit wide data path.
  •  24-bit wide instructions.
  •  Linear program memory addressing up to 4M instruction words.
  •  Linear data memory addressing up to 64 Kbytes.
  •  83 base instructions: mostly 1 word/1 cycle.
  •  Two 40-bit accumulators with rounding and saturation options.
  •  Flexible and powerful addressing modes:
    •  Indirect.
    •  Modulo.
    •  Bit-Reversed.
  •  Software stack.
  •  16 x 16 fractional/integer multiply operations.
  •  32/16 and 16/16 divide operations.
  •  Single-cycle multiply and accumulate:
    •  Accumulator write back for DSP operations.
    •  Dual data fetch.
  •  Up to ±16-bit shifts for up to 40-bit data.
• On-Chip Flash and SRAM:
  •  Flash program memory.
  •  Data SRAM.
  •  Boot, Secure, and General Security for program Flash.