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Manufacturer Part #

74LVC273PW,118

74LVC Series 3.6 V Reset Positive-Edge Trigger Octal D-Type Flip-Flop - TSSOP-20

ECAD Model:
Mfr. Name: Nexperia
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Product Specification Section
Nexperia 74LVC273PW,118 - Technical Attributes
Attributes Table
Logic Circuit: D-Type, Flip Flop IC
Family: A/LVC/E/H/U
No of Functions / Channels: 8
Supply Voltage-Nom: 1.65|3.6V
Supply Current: 100mA
Power Dissipation: 500mW
Propagation Delay: 10.5ns
Operating Temperature: -40°C to +125°C
Capacitance: 5pF
No of Inputs: 8
No of Outputs: Eight
High Level Output Current: -24mA
Low Level Output Current: 24mA
No of Pins: 20
Quiescent Current: 40µA
Moisture Sensitivity Level: 1
Package Style:  TSSOP-20
Mounting Method: Surface Mount
Features & Applications

The 74LVC273PW is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

The 74LVC273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop.

Features:

  • Wide supply voltage range from 1.2 to 3.6 V
  • Inputs accept voltages up to 5.5 V
  • CMOS low power consumption
  • Direct interface with TTL levels
  • Output drive capability 50 Ohm transmission lines at 85 Cel
  • Complies with JEDEC standard no. 8-1A
  • ESD protection:
    • HBM EIA/JESD22-A114-A exceeds 2000 V
    • MM EIA/JESD22-A115-A exceeds 200 V
  • Specified from -40 to +85 Cel. and -40 to +125 Cel

 

Pricing Section
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USA:
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On Order:
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Factory Lead Time:
8 Weeks
Minimum Order:
5000
Multiple Of:
2500
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Total
$725.00
USD
Quantity
Unit Price
2,500
$0.147
5,000
$0.145
7,500
$0.144
12,500
$0.143
25,000+
$0.14
Product Variant Information section