Référence fabricant
74LVC1G80GW,125
74LVC Series 3.3 V SMT Single D-Type Flip-Flop; Postive Edge Trigger - TSSOP-5
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| Nom du fabricant: | Nexperia | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :3000 par Reel Style d'emballage :TSSOP-5 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | |||||||||||
Product Specification Section
Nexperia 74LVC1G80GW,125 - Spécifications du produit
Informations de livraison:
L'article ne peut être envoyé à certains pays. Voir la liste
L'article ne peut pas être envoyé aux pays suivants:
ECCN:
EAR99
Informations PCN:
N/A
Fichier
Date
Statut du produit:
Actif
Actif
Nexperia 74LVC1G80GW,125 - Caractéristiques techniques
Attributes Table
| Logic Circuit: | D-Type, Flip Flop IC |
| Family: | A/LVC/E/H/U |
| No of Functions / Channels: | 1 |
| Supply Voltage-Nom: | 1.65V to 5.5V |
| Power Dissipation: | 0.25W |
| Propagation Delay: | 1.8ns |
| Operating Temperature: | -40°C to +125°C |
| Capacitance: | 5pF |
| No of Inputs: | 1 |
| No of Outputs: | Single |
| High Level Output Current: | -32mA |
| Low Level Output Current: | 32mA |
| No of Pins: | 5 |
| Quiescent Current: | 0.1µA |
| Moisture Sensitivity Level: | 1 |
| Style d'emballage : | TSSOP-5 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The 74LVC1G80GW,125 is a single positive-edge triggered D-type flip-flop.Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The input pin D must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down.
Features:
- Wide supply voltage range from 1.65 V to 5.5 V
- High noise immunity
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8B/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- ±24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Inputs accept voltages up to 5 V
- Multiple package options
- Specified from −40 °C to +85 °C and −40 °C to +125 °C
Pricing Section
Stock global :
0
États-Unis:
0
Sur commande :
0
Délai d'usine :
6 Semaines
Quantité
Prix unitaire
3 000
$0.0351
9 000
$0.0342
15 000
$0.0338
45 000
$0.033
75 000+
$0.0323
Product Variant Information section
Emballages disponibles
Qté d'emballage(s) :
3000 par Reel
Style d'emballage :
TSSOP-5
Méthode de montage :
Surface Mount