Référence fabricant
A42MX24-PQG208I
A42MX24 Series 912 LUTs 176 I/O 5.5 V Surface Mount FPGA - PQFP-208
| | |||||||||||
| | |||||||||||
| Nom du fabricant: | Microchip | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :1 par Bulk | ||||||||||
| Code de date: | |||||||||||
Microchip A42MX24-PQG208I - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Description of Change:Release of updated Synplify Pro ME version S-2021.09M-SP2 FPGA synthesis software bundled with Libero SoC v2022.3Reason for Change:Release updated Synplify Pro ME version S-2021.09M-SP2 FPGA synthesis software bundled with Libero SoC v2022.3 to prevent incorrect Verilog mapping of RTL using increment/decrement operations (++ / --) while indexing into an array on the right-hand side (RHS) of an assignment statement, as described in the attached Customer Notice.
Description of Change:Release of updated Synplify Pro ME version S-2021.09M-SP2 synthesis software bundled with Libero SoC v2022.3 as described in the attached customer notification details.Reason for Change:Release updated Synplify Pro ME version S-2021.09M-SP2 synthesis software bundled with Libero SoC v2022.3 to prevent incorrect VHDL expression evaluation during compilation, when performing subtraction with a real constant number operand, and an additional division/multiplication operation that uses a variable. This is to fix a VHDL compiler issue that occurs in specific VHDL expressions.
Statut du produit:
Emballages disponibles
Qté d'emballage(s) :
1 par Bulk