Référence fabricant
ST16C2552CJ44TR-F
ST16C2552 Series 4 Mbps 5.5 V Dual UART With 16-Byte Transmit - PLCC-44
MaxLinear ST16C2552CJ44TR-F - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Statut du produit:
MaxLinear ST16C2552CJ44TR-F - Caractéristiques techniques
Data Rate: | 4Mbps |
No of Functions / Channels: | 2 |
Interface Type: | Parallel |
Supply Voltage-Nom: | 2.97V to 5.5V |
Supply Current: | 3mA |
Power Dissipation: | 0.5W |
Clock Frequency-Max: | 64MHz |
Operating Temperature: | 0°C to 70°C |
Storage Temperature Range: | -65°C to +150°C |
Style d'emballage : | PLCC-44 |
Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The ST16C2552 (2552) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2552 is an improved version of the PC16552 UART. The 2552 provides enhanced UART functions with 16 byte FIFOs, a modem control interface, anddata rates up to 4 Mbps.
Onboard status registers provide the user with error indications and operational status. System interrupts and modem control features may be tailored by external software to meet specific user requirements.
Indepedendent programmable baud rate generators are privded to select transmit and receive clock rates from 50 Bps to 4 Mbps. The baud rate generator can be configured for either crystal or external clock input. An internal loopback capability allows onboard diagnostics. The 2552 provides block mode data transfers (DMA) through FIFO controls. DMA transfer monitoring is provided through the signals TXRDY# and RXRDY#. An Alternate Function Register provides the user with the ability to write the control registers for both UARTs concurrently.
The 2552 is available in the 44-PLCC package.
Features
- Pin-to-pin and functionally compatible to National PC16552
- Pin-to-pin Compatible to Exar’s XR16L2752 and XR16C2852
- 4 Mbps transmit/receive operation (64 MHz External Clock Frequency)
- 2 Independent UART Channels
- Register Set Compatible to 16C550
- 16 byte Transmit FIFO to reduce the bandwidth requirement of the external CPU
- 16 byte Receive FIFO with error tags to reduce the bandwidth requirement of the external CPU
- 4 selectable RX FIFO Trigger Levels
- Fixed Transmit FIFO interrupt trigger level
- Full Modem Interface (CTS#, RTS#, DSR#, DTR#, RI#, CD#)
- DMA operation and DMA monitoring via TXRDY# and RXRDY# pins
- UART internal register sections A & B may be written to concurrently
- Multi-Function output allows more package functions with few I/O pins
- Programmable character lengths (5, 6, 7, 8) with even, odd, or no parity
- Crystal oscillator or external clock input
- Industrial and commercial temperature ranges
- Pb-Free, RoHS Compliant Versions Offered
Emballages disponibles
Qté d'emballage(s) :
500 par Reel
Style d'emballage :
PLCC-44
Méthode de montage :
Surface Mount