Référence fabricant
M2GL005-1VFG400I
M2GL Series 703 kb RAM 171 I/O IGLOO2 FPGA - VFBGA-400
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| Nom du fabricant: | Microchip | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :90 par Tray Style d'emballage :VFBGA-400 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | 2133 | ||||||||||
Microchip M2GL005-1VFG400I - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Description of Change:Release of updated Synplify Pro ME version S-2021.09M-SP2 FPGA synthesis software bundled with Libero SoC v2022.3Reason for Change:Release updated Synplify Pro ME version S-2021.09M-SP2 FPGA synthesis software bundled with Libero SoC v2022.3 to prevent incorrect Verilog mapping of RTL using increment/decrement operations (++ / --) while indexing into an array on the right-hand side (RHS) of an assignment statement, as described in the attached Customer Notice.
Description of Change:Release of updated Synplify Pro ME version S-2021.09M-SP2 synthesis software bundled with Libero SoC v2022.3 as described in the attached customer notification details.Reason for Change:Release updated Synplify Pro ME version S-2021.09M-SP2 synthesis software bundled with Libero SoC v2022.3 to prevent incorrect VHDL expression evaluation during compilation, when performing subtraction with a real constant number operand, and an additional division/multiplication operation that uses a variable. This is to fix a VHDL compiler issue that occurs in specific VHDL expressions.
Microchip has released a new Datasheet for the IGLOO� 2 FPGA and SmartFusion� 2 SoC FPGA Datasheet of devices.Description of Change: The following is a summary of the changes in revision B of this document.� Updated Table 3-7 by adding FCS158 related information (FD-292).� Updated the information against Access time with feed-through write timing in Table 3-229 to Table 3-233 (FD-276).
Microchip has released a new Datasheet for the AN4153 Board and Layout Design Guidelines for SmartFusion2 SoC and IGLOO2 FPGAs of devices.Description of Change: The following is a summary of changes made in this revision: 1. Updated 1.1.2. Power Supply Sequencing. 2. Updated 1.2.2. I/O Glitch During Power-Down.Reason for Change: To Improve Productivity
PCN Status:Final NotificationPCN Type:Document ChangeDescription of Change:Implement change of memory density from 4GB to 2GB on selected Microsemi M2GLxx, RT4Gxx and 5962-16xx FPGA device families available in various packages.Impacts to Data Sheet:NoneChange ImpactNoneReason for Change:To improve productivity by implementing change of memory density from 4GB to 2GB.Change Implementation Status:In ProgressEstimated Implementation Date:December 16, 2021 (date code: 2151)
PCN Status:Final NotificationPCN Type:Document ChangeDescription of Change:Implement change of memory density from 4GB to 2GB on selected Microsemi M2GLxx, RT4Gxx and 5962-16xx device families available in various packages.Impacts to Data Sheet:NoneChange ImpactNoneReason for Change:To improve productivity by implementing change of memory density from 4GB to 2GB.Change Implementation Status:In Progress
Statut du produit:
Microchip M2GL005-1VFG400I - Caractéristiques techniques
| No of I/O Lines: | 171 |
| Flash Size (Bits): | 1Mb |
| RAM Size (Bits): | 703kb |
| Supply Voltage: | 1.14V to 1.26V |
| Operating Temp Range: | -40°C to +100°C |
| Storage Temperature Range: | -65°C to +150°C |
| Interface Type: | I2C |
| Temperature Grade: | Industrial |
| Moisture Sensitivity Level: | 3 |
| Style d'emballage : | VFBGA-400 |
| Méthode de montage : | Surface Mount |
Emballages disponibles
Qté d'emballage(s) :
90 par Tray
Style d'emballage :
VFBGA-400
Méthode de montage :
Surface Mount