Référence fabricant
PIC32MZ2048EFH144-E/PL
32 Bit MCU, FPU, 2MB Flash, 512KB RAM, 200MHz, 144Pin, USB-HS, ENET, CAN, SQI
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| Nom du fabricant: | Microchip | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :60 par Tube | ||||||||||
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Microchip PIC32MZ2048EFH144-E/PL - Spécifications du produit
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Microchip has released a new Product Documents for the PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family Silicon Errata of devices. If you are using one of these devices please read the document located at PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family Silicon Errata .Notification Status: FinalDescription of Change: The following Data Sheet clarifications were added:4. Module:IVREF DC CharacteristicsImpacts to Data Sheet: NoneReason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 17 Mar 2022NOTE: Please be advised that this is a change to the document only the product has not been changed.Markings to Distinguish Revised from Unrevised Devices: N/A
Microchip has released a new Product Documents for the PIC32MZ Embedded Connectivity with Floating Point Unit (EF) Family of devices.Description of Change: This revision includes the following changes, which are referenced by their respective chapter in Table C7. In addition, minor updates to text and formatting were incorporated throughout the document. The I2C, SPI and I2S standards use theterminology "Master" and "Slave". The equivalent Microchip terminology used in this document is "Host" and "Client" respectively.1) Device Overview 1.0a) Updated Table 1-6 PORTA through PORTK Pinout I/O Descriptions with new values for RD14 and RD15 for the 100-pin TFBGA packageb) Updated Table 1-21 Power, Ground, and Voltage Reference Pinout I/O Descriptions with new VDD and VSS values for the 100-pin TFBGA package2) Guidelines for Getting Started with 32-bit Microcontrollers 2.0 - Updated Non-5V tolerant input pins 2.11.1 with new values for device voltage for VDD and VSS, and updated the corresponding figure 2-10 with a new volt value for VDD3) HI-Speed USB with On-The-Go (OTG) 11.0 - Updated the bitfield numbering in the description for Register 11-25 USBDPBFD: USB Double Packet Buffer Disable Register for bits 16-1 4) I/O Ports 12.0 - Updated note 4 of Table 12-2 Input Pin Selection5) Deadman Timer (DMT) 15.0 - Updated Register 15-1 DMTCON: Deadman Timer Control Register with a new note6) Power Saving Features 33.0 - Added a new note to section Peripheral Module Disable 33.37) Special Features 34.0 - Added a new note to bit 31 of Register 34-4 DEVCFG1/ADEVCFG1:Device Configuration Word 18) Electrical Characteristics 37.0 - Updated Table 37-47 EBI Timing Requirements(1) with new minimum values and a new noteReason for Change: To Improve Productivity
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60 par Tube