Référence fabricant
ATSAMD20E18A-MUT
ARM® Cortex®-M0+ SAM D20E Microcontroller IC 32-Bit 48MHz 256KB (256K x 8) FLASH
Microchip ATSAMD20E18A-MUT - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
PCN Status:Final NotificationDescription of Change:Qualification of MP3A as an additional assembly site for ATSAMC20xxx, ATSAMC21xxx, ATSAMD20xxx and ATSAMD21xxx device families available in 32L VQFN (5x5x1mm) package.Reason for Change:To improve productivity by qualifying MP3A as an additional assembly site.
PCN Status:Initial NotificationDescription of Change:Qualification of MP3A as an additional assembly site for ATSAMC20xxx, ATSAMC21xxx, ATSAMD20xxx and ATSAMD21xxx device families available in 32L VQFN (5x5x1mm) package.Reason for Change:To improve productivity by qualifying MP3A as an additional assembly site.Change Implementation Status:In ProgressEstimated Qualification Completion Date:July 2023
Microchip has released a new Product Documents for the SAM D20 Datasheet of devices. If you are using one of these devices please read the document located at SAM D20 Datasheet.Notification Status: FinalDescription of Change:This revision includes numerous typographical corrections throughout the document. All other changes are described as follows:1) General: The SPI and I2C standards use the terminology "Master" and "Slave". The equivalent Microchip terminology, "Host" and "Client," is used in this document. This terminology has been updated throughout this document for this revision.2) RTC: Added a note to the RCONT bitfield in the READREQ Register.3) SERCOM SPI: Removed erroneous text in Host with Several Clients.4) TC: a) Updated the CTRLA Register with a new Register property for 8-bit, 16-bit and 32-bit Registers b) Updated the 8-bit COUNT Register with a new note and an updated Register Property c) Updated the 16-bit COUNT Register with a new note and an updated Register Property d) Updated the 32-bit COUNT Register with a new note and an updated Register Property5) Electrical Characteristics at 85C a) In SERCOM in SPI Mode Timing the table had minor formatting updates applied, and the typical and maximum values for tSCK switched b) In SERCOM in I2C Mode Timing minor formatting updates were applied to the table6) AEC-Q100 Electrical Characteristics at 125C: In SERCOM in SPI Mode Timing the table had minor formatting updates applied, and the typical and maximum values for tSCK switched.7) Acronyms and Abbreviations: Removed references to the TCC as this product does not contain a TCC.Impacts to Data Sheet: See above details.Reason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 18 Mar 2022NOTE: Please be advised that this is a change to the document only the product has not been changed.
Microchip has released a new Product Documents for the SAM D20 Family Silicon Errata of devices.Notification Status: FinalDescription of Change:1. The SPI and I2C standards use the terminology "Master" and "Slave". The equivalent Microchip terminology, "Host" and "Client", is used in this document. This terminology has been updated throughout this document for this revision.2. Added the following two errata issues: BOD: 1.4.3 HysteresisImpacts to Data Sheet: NoneReason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 25 Nov 202
Statut du produit:
Microchip ATSAMD20E18A-MUT - Caractéristiques techniques
Family Name: | SAMD20 |
Core Processor: | ARM Cortex M0+ |
Program Memory Type: | Flash |
Flash Size (Bytes): | 256kB |
RAM Size: | 32kB |
Speed: | 48MHz |
InterfaceType / Connectivity: | I2C/SPI/UART |
Peripherals: | Brownout Reset/Brown-out Detect/POR |
Supply Voltage: | 1.62V to 3.63V |
Operating Temperature: | -40°C to +85°C |
On-Chip ADC: | 10-chx12-bit |
On-Chip DAC: | 1-chx10-bit |
Watchdog Timers: | 2 |
Style d'emballage : | QFN-32EP |
Méthode de montage : | Surface Mount |
Emballages disponibles
Qté d'emballage(s) :
5000 par Reel
Style d'emballage :
QFN-32EP
Méthode de montage :
Surface Mount