Référence fabricant
DSPIC33CK256MP405T-I/M7
dsPIC33CK Series 256 kB Flash 100 MHz 16-Bit Microcontroller - VQFN-48
Microchip DSPIC33CK256MP405T-I/M7 - Spécifications du produit
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Microchip has released a new Datasheet for the dsPIC33CK1024MP710 Family Data Sheet of devices.Description of Change:This revision incorporates the following updates:� Sections:� Changed Functional Safety Support � ISO 26262/IEC 61508/IEC 60730 title and content.� Added new content to the first paragraph in 5.6.1 Flash Partition Swapping.� Added new paragraph to 12.2 Architecture Overview.� Added new paragraph to 30.6 Brown-out Reset (BOR). � Added note to 30.7 Dual Watchdog Timer (WDT).� Tables:� Updated Table 1. dsPIC33CK1024MP710 Motor Control/Power Supply Families with CAN FD, Table 2. dsPIC33CK1024MP710 MotorControl/Power Supply Families with No CAN FD, Table 5. 80-Pin TQFP, Table 8-3. Remappable Pin Inputs, Table 8-5. Remappable OutputPin Registers, Table 8-6. Output Selection for Remappable Pins (RPn), Table 33-3. Thermal Operating Conditions, Table 33-36. UARTxModule I/O Timing Requirements, Table 33-39. DACx Module Specifications and Table 34-19. DACx Module Specifications.� Registers:� Updated 3.5.29 Y Page Register, 7.7.1 Interrupt Request Flags Register 0, 7.7.14 Interrupt Enable Register 0, 9.11.1 Oscillator ControlRegister, 11.2.1 CAN Control Register Low, 12.6.8 Auxiliary Combinational Trigger Register Low, 12.6.9 Auxiliary Combinational TriggerRegister High, 12.6.10 Auxiliary Combinatorial PWM Logic Control Register y, 12.6.19 Auxiliary PWM Generator xy PCI Register Low,12.6.20 Auxiliary PWM Generator xy PCI Register High, 12.6.22 Auxiliary PWM Generator x Leading-Edge Blanking Register High, 14.4.4DACx Control Low Register, 14.4.8 DAC Slope x Control Low Register, 22.6.1 CCPx Control 1 Low Register and 28.1.1 Deadman TimerControl Register.� Changes all instances of PWM, FSMINPER, PG, MPER, PGxPER, PGxPHASE, PGxCAP, PGxCON, PGxTRIG, PGxSTAT, PGxDCA in the AuxiliaryPWM section to APWM, AFSMINPER, APG, AMPER, APGxPER, APGxPHASE, APGxCAP, APGxCON, APGxTRIG, APGxSTAT, APGxDCA.� Figures:� Updated Figure 11-1. CAN FD Module Block Diagram.Reason for Change: To Improve Productivity.
Statut du produit:
Microchip DSPIC33CK256MP405T-I/M7 - Caractéristiques techniques
Family Name: | dsPIC33CK |
Core Processor: | dsPIC |
Program Memory Type: | Flash |
Flash Size (Bytes): | 256kB |
RAM Size: | 128kB |
Speed: | 100MHz |
No of I/O Lines: | 39 |
InterfaceType / Connectivity: | I2C/I2S/SPI/UART |
Peripherals: | BOR/DMA/POR/PWM |
Number Of Timers: | 1 |
Supply Voltage: | 3V to 3.6V |
Operating Temperature: | -40°C to +85°C |
On-Chip ADC: | 19-chx12-bit |
On-Chip DAC: | 6-chx12-bit |
Watchdog Timers: | 1 |
Style d'emballage : | VQFN-48 |
Méthode de montage : | Surface Mount |
Emballages disponibles
Qté d'emballage(s) :
3300 par Reel
Style d'emballage :
VQFN-48
Méthode de montage :
Surface Mount