Microchip | SY58028UMG

This device is capable of handling clocks up to 7 GHz and data up to 10.7 Gbps and it includes unique, 3-pin input termination architecture that allows customers to interface to any differential signal (AC- or DC-coupled) as small as 100 mV without any level shifting or termination resistor networks in the signal path.

Features:

• Selects 1 of 4 differential inputs
• Provides two copies of the selected input
• Guaranteed AC performance over temperature and voltage:
• DC-to- > 10.7Gbps data rate throughput
  • < 350ps IN-to-Out tpd
  • < 60ps tr / tf times
• Ultra low-jitter design:
  • < 10psPP total jitter (clock)
  • < 1psRMS random jitter
  • < 10psPP deterministic jitter
  • < 0.7psRMS crosstalk-induced jitter
• Unique patended input design minimizes crosstalk
• Accepts an input signal as low as 100 mV
• Internal 50 Ω output source termination
• 400mV CML output swing (RL = 50 Ω)
• Power supply 2.5 V ±5% or 3.3 V ±10%
• –40°C to +85°C temperature range
• Available in 32-pin (5mm × 5mm) MLF® package

Applications:

• Redundant clock and/or data distribution
• All SONET/SDH clock/data distribution
• Loopback
• All Fibre Channel distribution
• All Ethernet clock and/or data distribution