Référence fabricant
74LVC273PW,118
74LVC Series 3.6 V Reset Positive-Edge Trigger Octal D-Type Flip-Flop - TSSOP-20
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| Nom du fabricant: | Nexperia | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :2500 par Reel Style d'emballage :TSSOP-20 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | 2420 | ||||||||||
Product Specification Section
Nexperia 74LVC273PW,118 - Spécifications du produit
Informations de livraison:
L'article ne peut être envoyé à certains pays. Voir la liste
L'article ne peut pas être envoyé aux pays suivants:
ECCN:
EAR99
Informations PCN:
N/A
Fichier
Date
Statut du produit:
Actif
Actif
Nexperia 74LVC273PW,118 - Caractéristiques techniques
Attributes Table
| Logic Circuit: | D-Type, Flip Flop IC |
| Family: | A/LVC/E/H/U |
| No of Functions / Channels: | 8 |
| Supply Voltage-Nom: | 1.65|3.6V |
| Supply Current: | 100mA |
| Power Dissipation: | 500mW |
| Propagation Delay: | 10.5ns |
| Operating Temperature: | -40°C to +125°C |
| Capacitance: | 5pF |
| No of Inputs: | 8 |
| No of Outputs: | Eight |
| High Level Output Current: | -24mA |
| Low Level Output Current: | 24mA |
| No of Pins: | 20 |
| Quiescent Current: | 40µA |
| Moisture Sensitivity Level: | 1 |
| Style d'emballage : | TSSOP-20 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The 74LVC273PW is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.
The 74LVC273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop.
Features:
- Wide supply voltage range from 1.2 to 3.6 V
- Inputs accept voltages up to 5.5 V
- CMOS low power consumption
- Direct interface with TTL levels
- Output drive capability 50 Ohm transmission lines at 85 Cel
- Complies with JEDEC standard no. 8-1A
- ESD protection:
- HBM EIA/JESD22-A114-A exceeds 2000 V
- MM EIA/JESD22-A115-A exceeds 200 V
- Specified from -40 to +85 Cel. and -40 to +125 Cel
View the 74LVC273 family of D-Type Flip-Flops
Pricing Section
Stock global :
45 000
d’Allemagne (En ligne seulement):
45 000
Délai d'usine :
8 Semaines
Quantité
Prix unitaire
2 500
$0.149
5 000
$0.147
7 500
$0.146
10 000
$0.145
12 500+
$0.143
Product Variant Information section
Emballages disponibles
Qté d'emballage(s) :
2500 par Reel
Style d'emballage :
TSSOP-20
Méthode de montage :
Surface Mount
