Référence fabricant
74LVC1G74DC,125
74LVC Series 5.5 V SMT Single D-Type Flip-Flop; Positive-Edge Trigger - VSSOP-8
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| Nom du fabricant: | Nexperia | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :3000 par Reel Style d'emballage :VSSOP-8 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | 2349 | ||||||||||
Nexperia 74LVC1G74DC,125 - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Statut du produit:
Nexperia 74LVC1G74DC,125 - Caractéristiques techniques
| Logic Circuit: | D-Type, Flip Flop IC |
| Family: | A/LVC/E/H/U |
| No of Functions / Channels: | 1 |
| Output Characteristics: | Complementary |
| Supply Voltage-Nom: | 1.65V to 5.5V |
| Power Dissipation: | 0.3W |
| Propagation Delay: | 2.5ns |
| Operating Temperature: | -40°C to +125°C |
| Capacitance: | 4pF |
| No of Inputs: | 1 |
| No of Outputs: | Single |
| High Level Output Current: | -32mA |
| Low Level Output Current: | 32mA |
| No of Pins: | 8 |
| Quiescent Current: | 0.1µA |
| Moisture Sensitivity Level: | 1 |
| Style d'emballage : | VSSOP-8 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The 74LVC1G74DC,125 is a single positive edge triggered D-type flip-flop with individual data (D) inputs, clock (CP) inputs, set (SD) and reset (RD) inputs, and complementary Q and Q outputs.
This device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing damaging backflow current through the device when it is powered down. The set and reset are asynchronous active LOW inputs and operate independently of the clock input. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse.
Features:
- Wide supply voltage range from 1.65 V to 5.5 V
- 5 V tolerant inputs for interfacing with 5 V logic
- High noise immunity
- Complies with JEDEC standard:
- JESD8-7 (1.65 V to 1.95 V)
- JESD8-5 (2.3 V to 2.7 V)
- JESD8-B/JESD36 (2.7 V to 3.6 V)
- ESD protection:
- HBM JESD22-A114F exceeds 2000 V
- MM JESD22-A115-A exceeds 200 V
- ±24 mA output drive (VCC = 3.0 V)
- CMOS low power consumption
- Latch-up performance exceeds 250 mA
- Direct interface with TTL levels
- Inputs accept voltages up to 5 V
- Multiple package options
- Specified from −40 °C to +85 °C and −40 °C to +125 °C
Emballages disponibles
Qté d'emballage(s) :
3000 par Reel
Style d'emballage :
VSSOP-8
Méthode de montage :
Surface Mount
