Nexperia | 74LVC02APW,118

The first CMOS (Complementary Metal–Oxide–Semiconductor)  logic family of integrated circuits was introduced 1968. Initially CMOS logic was slower than LS-TTL; however, because the logic thresholds of CMOS were proportional to the power supply voltage, CMOS devices were well-adapted to battery-operated systems with simple power supplies.

Because of the incompatibility of the CD4000 series of chips with the previous TTL family, a new standard emerged which combined the best of the TTL family with the advantages of the CD4000 family. It was known as the 74HC (High performance silicon gate) family of devices.

With HC/HCT logic and LS-TTL logic competing in the market it became clear that a logic device that combined high speed, with low power dissipation and compatibility with older logic families was needed. A whole range of newer families has emerged that use CMOS technology.  Some of the more important family designators of these newer devices includes LV/LVT/ALVT.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in a mixed 3.3 V and 5 V environment.

The 74LVC02A provides the 2-input NOR function.

The NXP 74LVC02APW-T is a 3.3 volt CMOS Quad 2 Input NOR Gate. It comes in a 14 Pin TSSOP Tape and Reel Package.