Nexperia | 74HCT4051PW,118

The 74HCT4051PW,118 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC standard no. 7A.

The 74HC4051; 74HCT4051 is an 8-channel analog multiplexer/demultiplexer with three digital select inputs (S0 to S2), an active-LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2.

Features:

• Wide analog input voltage range from —5 V to +5 V
• Low ON resistance:
• 80 Ω (typical) at VCC — VEE = 4.5 V
• 70 Ω (typical) at VCC — VEE = 6.0 V
• 60 Ω (typical) at VCC — VEE = 9.0 V
• Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
• Typical ‘break before make’ built-in
• ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-A exceeds 200 V
• Multiple package options
• Specified from —40 °C to +85 °C and —40 °C to +125 °C

Applications:

• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating

View the complete family of 74HCT4051 Multiplexer/Demultiplexers