Nexperia | 74HC4052PW,118

The 74HC4052PW is a high-speed Si-gate CMOS device and is pin compatible with the HEF4052B. The device is specified in compliance with JEDEC standard no. 7A.

The 74HC4052 is a dual 4-channel analog multiplexer/ demultiplexer with common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E).

Features:

• Wide analog input voltage range from -5 V to +5 V
• Low ON resistance:
  • 80 W (typical) at VCC - VEE = 4.5 V
  • 70 W (typical) at VCC - VEE = 6.0 V
  • 60 W (typical) at VCC - VEE = 9.0 V
• Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals
• Typical ‘break before make’ built-in
• Complies with JEDEC standard no. 7A
• ElectroStatic Discharge (ESD) protection:
  • Human Body Model (HBM) EIA/JESD22-A114E exceeds 2000 V
  • Machine Model (MM) EIA/JESD22-A115-A exceeds 200 V
• Specified from -40 °C to +85 °C and -40 °C to +125 °C

Applications:

• Analog multiplexing and demultiplexing
• Digital multiplexing and demultiplexing
• Signal gating

View the 74HC4052 family of Multiplexer/Demultiplexers