NXP | PCA9517D,118

The PCA9517 is a CMOS integrated circuit that provides level shifting between low voltage (down to 0.9 V) and higher voltage (2.7 V to 5.5 V) I2C-bus or SMBus applications. While retaining all the operating modes and features of the I2C-bus system during the level shifts, it also permits extension of the I2C-bus by providing bidirectional buffering for both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. Using the PCA9517 enables the system designer to isolate two halves of a bus for both voltage and capacitance. The SDA and SCL pins are over voltage tolerant and are high-impedance when the PCA9517 is unpowered.

Features:

• 2 channel, bidirectional buffer isolates capacitance and allows 400 pF on either side of the device
• Voltage level translation from 0.9 V to 5.5 V and from 2.7 V to 5.5 V
• Footprint and functional replacement for PCA9515/15A
• I2C-bus and SMBus compatible
• Active HIGH repeater enable input
• Open-drain input/outputs
• Lock-up free operation
• Supports arbitration and clock stretching across the repeater
• Accommodates Standard mode and Fast mode I2C-bus devices and multiple masters
• Powered-off high-impedance I2C-bus pins
• A-side operating supply voltage range of 0.9 V to 5.5 V
• B-side operating supply voltage range of 2.7 V to 5.5 V
• 5 V tolerant I2C-bus and enable pins

View the PCA9517D,118 family of I2C