Microchip | SY100EP56VK4G-TR

The SY100EP56VK4G TR is a high-speed, low-skew, fully differential Dual PECL/ECL 2:1 multiplexer. This device is a pin-for-pin, plug-in replacement to the MC10/100EP56DT. Two separate 2:1 multiplexers (Channel 0 and Channel 1) with dedicated select control pins (SEL0 and SEL1) are implemented in a 20-pin TSSOP package.

The signal-path inputs (D0a, D0b and D1a, D1b) accept differential signals as low as 150 mV pk-pk. For applications that require common select control for both channels A & B, a common select pin (COM_SEL) is available. All I/O pins are 100 k PECL/ECL logic compatible. AC–performance is guaranteed over the industrial –40°C to +85°C temperature range and 3.0 V to 5.5 V supply voltage range. This device will operate in PECL/LVPECL or ECL/ LVECL mode. The 500 ps max (400 typ) propagation delay is matched for all signal and logic select paths: D-to-QOUT, SEL-to-QOUT, and COM_SEL-to-QOUT. Two VBB output reference pins (approx equal to VCC –1.4 V) are available for AC–coupled or single-ended applications. The SY100EP56 V is part of Micrel’s high-speed, Precision Edge timing and distribution family. For applications that require a different I/O combination, consult the Micrel website at www.micrel.com, and choose from a comprehensive product line of high-speed, low skew fanout buffers, translators, and clock dividers.

Key Features:

• Dual, fully differential 2:1 PECL/ECL multiplexer.
• Guaranteed AC parameters over temperature/voltage:
• > 3 GHz fMAX (toggle).
• < 100 ps within device skew.
• < 230 ps rise/fall times.
• < 500 ps propagation delay.
• Flexible power supply: 3.0 V to 5.5 V.
• Wide operating temperature range: –40°C to +85°C.
• VBB reference for AC-coupled and single-ended applications.
• Both channels have independent input select or common select control.
• 100 k PECL/ECL compatible logic.
• Available in 20-pin TSSOP package.

To learn more about the SY100EP56 product family, Click Here.