Manufacturer Part #
ATSAME53J20A-MU
SAME53 Series 1 MB Flash 256 kB RAM 32-Bit SMT Microcontroller - QFN-64
Microchip ATSAME53J20A-MU - Product Specification
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Microchip has released a new Errata for the SAM D5x/E5x Family Silicon Errata and Data Sheet Clarification of devices.Notification Status: FinalDescription of Change: The following errata were added in this revision:� Device: 2.6.10 Power UpImpacts to Data Sheet: NoneChange Implementation Status: CompleteDate Document Changes Effective: 01 Mar 2023
Microchip has released a new Errata for the SAM D5x/E5x Family Silicon Errata and Data Sheet Clarification of devices.Notification Status: FinalDescription of Change: The following errata were added in this revision:� SERCOM: 2.18.26 SERCOM-USART LIN Host Delays� SERCOM: 2.18.27 SERCOM-USART Two Stop Bits in LIN Host The following errata were updated with new verbiage in this revision:� Device: Detection of a Debugger Probe 2.6.3� SUPC: Buck Converter Mode 2.19.1Impacts to Data Sheet: NoneChange Implementation Status: CompleteDate Document Changes Effective: 12 Dec 2022
Microchip has released a new Errata for the SAM D5x E5x Family Silicon Errata and Data Sheet Clarification of devices.Revision History:October 14, 2022: Updated "Date Document Change Effective" to "Estimated First Ship Date".Description of Change: The following updates were implemented in this revision along with numerous typographical corrections: �Updated the silicon revision throughout the document to F � Deprecated DAC errata for Smoothing of the Output Signal in Differential Mode The following errata were added in this revision: � ADC: Internal Bandgap Reference 2.1.6 � CAN: Transmit Cancellation 2.4.14 � Device: Standby Mode 2.6.9 � DAC: Refresh Mode 2.9.7 � NVMCTRL: Debugger Illegal Accesses 2.14.3 � TCC: STATUS Register Access 2.21.9 � TCC: Sequence State 2.21.10 � EVSYS: Synchronous/Resynchronized Modes 2.24.3 � OSC32KCTRL: Clock Switch Back Feature Limitation 2.26.1 � OSCCTRL: Clock Switch Back Feature Limitation 2.27.1 The following Data Sheet Clarifications were added in this revision: � I/O Pins Maximum Output Current Table 54-1Reason for Change: To Improve Productivity
Microchip has released a new Errata for the SAM D5x E5x Family Silicon Errata and Data Sheet Clarification of devices.Description of Change: The following updates were implemented in this revision along with numerous typographical corrections: �Updated the silicon revision throughout the document to F � Deprecated DAC errata for Smoothing of the Output Signal in DifferentialMode The following errata were added in this revision: � ADC: Internal Bandgap Reference 2.1.6 � CAN: Transmit Cancellation 2.4.14 �Device: Standby Mode 2.6.9 � DAC: Refresh Mode 2.9.7 � NVMCTRL: Debugger Illegal Accesses 2.14.3 � TCC: STATUS Register Access2.21.9 � TCC: Sequence State 2.21.10 � EVSYS: Synchronous/Resynchronized Modes 2.24.3 � OSC32KCTRL: Clock Switch Back FeatureLimitation 2.26.1 � OSCCTRL: Clock Switch Back Feature Limitation 2.27.1 The following Data Sheet Clarifications were added in thisrevision: � I/O Pins Maximum Output Current Table 54-1Reason for Change: To Improve Productivity
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Microchip ATSAME53J20A-MU - Technical Attributes
Family Name: | SAME53 |
Core Processor: | ARM Cortex M4F |
Program Memory Type: | Flash |
Flash Size (Bytes): | 1MB |
RAM Size: | 256kB |
Speed: | 120MHz |
No of I/O Lines: | 51 |
InterfaceType / Connectivity: | EBI/EMI/Ethernet/IrDA/I2C/LIN/MMC/QSPI/SD/SPI/UART/USART/USB |
Peripherals: | Brown-out Detect/DMA/I2S/POR/PWM/Reset/Watchdog |
Supply Voltage: | 1.71V to 3.6V |
Operating Temperature: | -40°C to +85°C |
On-Chip ADC: | 24-chx12-bit |
On-Chip DAC: | 2-chx12-bit |
Watchdog Timers: | 1 |
Package Style: | QFN-64 |
Mounting Method: | Surface Mount |
Available Packaging
Package Qty:
260 per Tray
Package Style:
QFN-64
Mounting Method:
Surface Mount