Microchip | SY58017UMG

The SY58017UMG is a ultra-precision differential CML 2:1 MUX with internal I/O termination capable of handling clocks up to 7GHz and data up to 10.7Gbps.

It includes unique, 3-pin input termination architecture that allows customers to interface to any differential signal (AC- or DC-coupled) as small as 100 mV without any level shifting or termination resistor networks in the signal path.

Features:

• Guaranteed AC performance over temperature and voltage:
  • DC to >10.7 Gbps data throughput
  • DC to>7 GHz fMAX (clock)
  • <240 ps propagation delay
  • <60 ps tr/tf times
• Ultra-low crosstalk-induced jitter: 1 ps(rms)
• Ultra-low jitter design:
  • <1 ps(RMS) random jitter
  • <10 ps(PP) deterministic jitter
  • <10 ps(PP) total jitter (clock)
• Unique input termination and VT pin accepts:
  • DC-coupled 
  • AC-coupled 
• Internal 50 output source termination
• Typical 400 mV CML output swing (RL = 50)
• Power supply 2.5 V ±5% or 3.3 V ±10%

Applications:

• Redundant clock distribution
• OC-3 to OC-192 SONET/SDH clock/data distribution
• Loopback
• Fiber Channel distribution