NXP | DSPB56367AG150

• Multimode, multichannel decoder software functionality
• Dolby and/or DTS license required:
• DTS Neo6
• Prologic II
• DTS 96/24
• AAC Decoders
• Post-processing capabilities:
• Bass management
• Volume management
• Delay management
• Dolby ProLogic
• Auxiliary mix down
• Auto detection
• Digital Signal Processing Core:
• 150 MIPS with a 150 MHz clock at 1.8 V core with a 3.3 V peripheral I/O OR 100 MIPS with a 100 MHz clock at 1.5 V core with a 3.3 V peripheral I/O
• Object Code Compatible with the the DSP56000 core with highly parallel instruction set 
• Six-channel DMA controller
• Very low-power CMOS design, fully static design with operating frequencies down to DC
• STOP and WAIT low-power standby modes
• On-chip Memory Configuration:
• 5 K - 7 K x 24 Bit Y-Data RAM and 8 K x 24 Bit Y-Data ROM
• 8 K - 13 K x 24 Bit X-Data RAM and 32 K x 24 Bit X-Data ROM
• 40 K x 24 Bit Program ROM
• Off-chip memory expansion:
• External Memory Expansion Port
• Off-chip expansion up to two 16 M x 24-bit word of Data memory
• Off-chip expansion up to 16 M x 24-bit word of Program memory
• Simultaneous glueless interface to SRAM and DRAM

View the DSPB563 family of Digital Signal Processors