Efinix — Titanium Ti375 FPGAs

Efinix Titanium Ti375 FPGA Device and Development Kit

Features the high-density, low-power Efinix^® Quantum^® compute fabric wrapped with an I/O interface

The Ti375 FPGA by Efinix features the high-density, low-power Efinix^® Quantum^® compute fabric wrapped with an I/O interface. This FPGA has a variety of features, such as a hardened RISC-V block, SerDes transceiver, LPDDR4/4x DRAM controller, and MIPI D-PHY.

The quad-core hardened RISC-V block has a 32-bit CPU featuring the ISA RISCV32I with M, A, C, F, and D extensions, and six pipeline stages. You utilize the hardened RISC-V block by instantiating the Sapphire High-Performance SoC, combining the speed and efficiency of a hardened RISC-V block with the flexibility of peripherals in soft logic.

The full-duplex SerDes transceiver supports multiple protocols including PCIe 4.0, Ethernet SGMII, and Ethernet 10GBase-KR protocols as well as a PMA Direct mode with data rates from 1.25 Gbps to 16 Gbps.

Efinix Ti375 FPGAs include a hardened MIPI D-PHY, which you can use with MIPI CSI-2 and DSI controller IP cores to create multi-camera, high definition vision systems, edge computing, and hardware acceleration systems. Additionally, these FPGAs have a hardened DDR DRAM controller block that supports the LPDDR4/4x DRAM interface.

Features

Applications