onsemi | MC100LVEL91DWG

The MC100LVEL91 is a triple LVPECL input to ECL output translator. The device receives low voltage differential PECL signals, determined by the VCC supply level, and translates them to differential −3.3 V to −5.0 V ECL output signals.

To accomplish the level translation the LVEL91 requires three power rails. The VCC supply should be connected to the positive supply, and the VEE pin should be connected to the negative power supply. The GND pins are connected to the system ground plane. Both VEE and VCC should be bypassed to ground via 0.01 µF capacitors. Under open input conditions, the D input will be biased at VCC/2 and the D input will be pulled to GND. This condition will force the Q output to a low, ensuring stability.

The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 µF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open.

Key Features:

• 620 ps Typical Propagation Delay
• The 100 Series Contains Temperature Compensation
• Operating Range: VCC = 3.8 V to 3.0 V; VEE = −3.0 V to −5.5 V; GND = 0 V
• Q Output will Default LOW with Inputs Open or at GND
• Pb−Free Packages are Available

Learn more about the MC100LVEL91 Family of Translators