NXP | MC9S12DG128CFUE

It has 8-channel pulse-width modulator (PWM), 20 discrete digital I/O lines, and an Inter-IC Bus. System resource mapping, clock generation, interrupt control and bus interfacing are managed by the System Integration Module (SIM).

The MC9S12D has full 16-bit data paths throughout. However, the external bus can operate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted to suit operational requirements.

Features:

• Upward compatible with M68HC11 instruction set
• Interrupt stacking and programmer's model identical to M68HC11
• Instruction pipe
• Enhanced indexed addressing Memory:
• Until 512 Kbyte Flash EEPROM
• until 4 Kbyte EEPROM
• Until 12 Kbyte RAM