Référence fabricant
DSPIC33FJ256GP710A-E/PT
dsPIC33F Series 30 kB RAM 256 kB Flash 16-Bit Digital Signal Controller TQFP-100
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| Nom du fabricant: | Microchip | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :119 par Tray Style d'emballage :TQFP-100 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | |||||||||||
Product Specification Section
Microchip DSPIC33FJ256GP710A-E/PT - Spécifications du produit
Informations de livraison:
L'article ne peut être envoyé à certains pays. Voir la liste
L'article ne peut pas être envoyé aux pays suivants:
ECCN:
3A991.a.2
Cet article peut être assujetti à des contrôles de licence d’exportation.
Informations PCN:
Fichier
Date
Assembly Site Change
03/17/2015 Détails et téléchargement
Final Notice: Qualification of 100L TQFP (12x12x1mm) with 240x240 Lead-Frame Paddle size at ASAC (UDG) assembly site. Pre Change: Assembled at MTAI assembly site.Post Change: Assembled at MTAI and ASAC assembly sites.Please be advised that after the estimated first ship date customers may receive pre and post change parts.
Statut du produit:
Actif
Actif
Microchip DSPIC33FJ256GP710A-E/PT - Caractéristiques techniques
Attributes Table
| Family Name: | dsPIC33F |
| Core Processor: | dsPIC |
| Program Memory Type: | Flash |
| Flash Size (Bytes): | 256kB |
| RAM Size: | 30kB |
| Speed: | 40MHz |
| No of I/O Lines: | 85 |
| InterfaceType / Connectivity: | CAN/I2C/SPI/UART |
| Peripherals: | DMA/I2S/POR/PWM/Watchdog |
| Number Of Timers: | 9 |
| Supply Voltage: | 3V to 3.6V |
| Operating Temperature: | -40°C to +85°C |
| On-Chip ADC: | 2-chx12-bit |
| Watchdog Timers: | 1 |
| Style d'emballage : | TQFP-100 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The DSPIC33FJ256GP710A-E/PT is a 16-Bit High-Performance Digital Signal Controller with 30 Kbyte of RAM and 256 Kbyte of Program memory. This controller with codec interfaces is well-suited for speech and audio processing applications.
Features:
- Modified Harvard architecture
- C compiler optimized instruction set
- 16-bit wide data path
- 24-bit wide instructions
- Linear program memory addressing up to 4M instruction words
- Linear data memory addressing up to 64 Kbytes
- 83 base instructions: mostly 1 word/1 cycle
- Sixteen 16-bit General Purpose Registers
- Two 40-bit accumulators:
- With rounding and saturation options
- Flexible and powerful addressing modes:
- Indirect, Modulo and Bit-Reversed
- Software stack
- 16 x 16 fractional/integer multiply operations
- 32/16 and 16/16 divide operations
- Single-cycle multiply and accumulate:
- Accumulator write back for DSP operations
- Dual data fetch
- Up to ±16-bit shifts for up to 40-bit data
- Low-power, high-speed Flash technology
- Fully static design
- 3.3V (±10%) operating voltage
- Industrial temperature
- Extended temperature
- Low-power consumption
Pricing Section
Stock global :
0
États-Unis:
0
Sur commande :
0
Délai d'usine :
4 Semaines
Quantité
Prix Internet
119+
$9.14
Product Variant Information section
Emballages disponibles
Qté d'emballage(s) :
119 par Tray
Style d'emballage :
TQFP-100
Méthode de montage :
Surface Mount
