Référence fabricant
SY100ELT23ZG-TR
SY100ELT23 Series 5.5 V Dual Differential PECL-to-TTL Translator - SOIC-8
Microchip SY100ELT23ZG-TR - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Description of Change:Qualification of MMT as an additional assembly site for selected SY100EPTxxxxx, SY100ELTxxxxx, SY100EL3xxxx and SY100EL1xxxx device families available in 8L SOIC (3.90mm) package.Reason for Change:To improve productivity by qualifying MMT as an additional assembly site.Change Implementation Status:In ProgressEstimated First Ship Date:March 15, 2023 (date code: 2311)
Microchip has released a new Product Documents for the SY100ELT23 - Dual Differential PECL-to-TTL Translator of devices.Notification Status: FinalDescription of Change:1. Corrected the description for Pins 1 and 2 in Table 2-1.Impacts to Data Sheet: See above details.Reason for Change: To Improve ProductivityChange Implementation Status: CompleteDate Document Changes Effective: 18 April 2022
Statut du produit:
Microchip SY100ELT23ZG-TR - Caractéristiques techniques
No of Channels: | 2 |
Input Type: | PECL |
Output Type: | TTL |
Supply Voltage: | 4.5V to 5.5V |
Style d'emballage : | SOIC-8 |
Méthode de montage : | Surface Mount |
Fonctionnalités et applications
The the low skew dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data signal. It is available in both ECL standards: the 10ELT is compatible with positive ECL 10H logic levels, while the 100ELT is compatible with positive ECL 100K logic levels.
Features:
- 3.0ns typical propagation delay
- <500ps typical output-to-output skew
- Differential PECL inputs
- 24mA TTL outputs
- Flow-through pinouts
- Internal input 50kΩ pulldown resistors
- Available in 8-pin SOIC packag
Emballages disponibles
Qté d'emballage(s) :
1000 par Reel
Style d'emballage :
SOIC-8
Méthode de montage :
Surface Mount