Référence fabricant
W5300
W5300 Series 3.6V Fully Hardwired Network Protocol Embedded Ethernet Controller
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| Nom du fabricant: | WIZnet | ||||||||||
| Emballage standard: | Product Variant Information section Emballages disponiblesQté d'emballage(s) :90 par Tray Style d'emballage :LQFP-100 Méthode de montage :Surface Mount | ||||||||||
| Code de date: | 2223 | ||||||||||
WIZnet W5300 - Spécifications du produit
Informations de livraison:
ECCN:
Informations PCN:
Statut du produit:
WIZnet W5300 - Caractéristiques techniques
| Supply Voltage-Nom: | 3V to 3.6V |
| No of Functions / Channels: | 1 |
| Interface Type: | MII |
| Data Rate: | 50Mbps |
| Operating Temp Range: | -40°C to +85°C |
| Storage Temperature Range: | -55°C to +125°C |
| No of Terminals: | 100 |
| Moisture Sensitivity Level: | 3 |
| Style d'emballage : | LQFP-100 |
| Méthode de montage : | Surface Mount |
Fonctionnalités et applications
Established in 1998, WIZnet’s core technology ‘TCP/IP Offload Platform’ is an ASSP and silicon-proven IP for custom ASIC, which best fits OS-less devices and is compatible with any Embedded OS. Their fully hardwired TCP/IP algorithm guarantees line speed by on-the-fly processing architecture that is independent of any main processor. This technology has eliminated the need for a main processor by offloading TCP/IP processing, enhancing the overall system performance, particularly in multimedia streaming applications.
WIZnet’s hardwired TCP/IP chip has been adopted worldwide both in OS-less devices (esp. DVR, Remote Control) and OS-based applications (esp. STB, DTV). It provides higher performance and stability than any software internet connectivity solution.
Fully Hardwired Newtwork protocol Embedded Ethernet Controller designed for high speed required
embedded system
Features:
- Supports hardwired TCP/IP protocols : TCP,UDP, ICMP, IPv4, ARP, IGMPv2, PPPoE, Ethernet
- Supports 8 independent SOCKETs simultaneously
- High network performance : Up to 80Mbps (DMA)
- Supports hybrid TCP/IP stack(software and hardware TCP/IP stack)
- IP Fragmentation is not supported
- Internal 128Kbytes memory for data communication(Internal TX/RX memory)
- More flexible allocation internal TX/RX memory according to application throughput
- Supports memory-to-memory DMA (only 16bit Data bus width & slave mode)
- Embedded 10BaseT/100BaseTX Ethernet PHY
- Supports auto negotiation (Full-duplex and half duplex)
- Supports auto MDI/MDIX(Crossover)
- Supports network Indicator LEDs (TX, RX, Full/Half duplex, Collision, Link, Speed)
- Supports a external PHY instead of the internal PHY
- Supports 16/8 bit data bus width
- Supports 2 host interface mode(Direct address mode & Indirect address mode)
- External 25MHz operation frequency (For internal PLL logic, period=40ns)
- Internal 150MHz core operation frequency (PLL_CLK, period=about 6.67ns)
- Network operation frequency (NIC_CLK : 25MHz(100BaseTX) or 2.5MHz(10BaseT))
- 3.3V operation with 5V I/O signal tolerance
- Embedded power regulator for 1.8V core operation
- 0.18 µm CMOS technology
- 100LQFP 14X14 Lead-Free Package
Emballages disponibles
Qté d'emballage(s) :
90 par Tray
Style d'emballage :
LQFP-100
Méthode de montage :
Surface Mount